A cutting edge for Europe’s telecos

System design Intellectual Property (IP) is one of the main assets of Europe’s telecom industry, yet it remains under-exploited due to increasing complexity and performance demands. SYDIC-Telecom’s framework promotes effective reuse of this knowledge.

This three-year IST programme-funded project brought together some of Europe’s major players, such as Nokia, Ericsson, Alcatel, and Philips Semiconductors, who collectively identified crucial needs for system level design methodology not addressed by research community activities, standardisation efforts or commercial tool development.

According to project manager Adam Morawiec, the project’s objective was “to provide a solution to the problem of making the know-how about system design more usable, sharable and preservable – yet protected.”

Morawiec explains how the first operational goal was a characterisation of the current design flows of the partners in order to obtain an agreement on concepts and terminology and to identify the principal problems and inefficiencies.

Next a common system-level conceptual model was developed in the form of a reference frame on which to build a methodology supported by the design flows of consortium members Intracom (Greece) and Alcatel. Once the initial version of this SDCM (System Design Conceptual Model) became available, Intracom prepared an initial list of measurable parameters, and quantitative and qualitative assessment criteria.

Intracom and Alcatel also prepared the assessment procedure with two major case studies. Intracom evaluated the IP reuse criteria in the HiperLAN/2 system design, through the reuse of an IP component implementing Viterbi decoder, while Alcatel has performed the evaluation in the context of a high-speed router, terminating OC-48 links. Together with the development of a system level conceptual model, the requirements of this state-of-the-art practice analysis and definition of system level design languages and formalisms resulted in an effective system design methodology that can help Europe’s telecommunication companies stay at the cutting edge of telecom products.

In order to accelerate the adoption by European industry of the methodology developed in this project, Morawiec says the group promoted the results to European system and microelectronics companies. More visibility was provided at international events, in the press and on the European Electronic Chips & Systems design Initiative website, he adds.

Contact:
Adam Morawiec
Parc Equation
2, Avenue de Vignate
F-38610 Gieres
France
Tel: +33-4-76634934
Fax: +33-4-76428787
Email: Adam.Morawiec@ecsi.org