Smaller microchips that consume less energy

To develop ever-smaller chips that consume less. These are the indispensable requirements of the current market for portable applications such as mobile telephone technology and biomedical systems, obtaining correct and trouble-free operation of the devices over the maximum possible duration of time. One of the techniques which, in fact, can be used for the development of this type of reduced-size, low-consumption microchip is one analysed by Carlos Aristóteles de la Cruz in his PhD defended at the Public University of Navarre. The thesis is titled, “Design and Implementation of Very Low Voltage Square-Root Domain Circuits with On-chip Tuning”.

Silicon prototypes

The SRD (Square-Root Domain) techniques is one of the methods enabling the design of chips or integrated circuits with low power sources, i.e. circuits that can function suitably in those situations where there is a low level of power supply. The technique is based on the design of circuits the internal processing system of which is non-lineal – although the input-output relation is lineal.

The PhD not only presents simulations of designed systems, but also provides experimental results obtained from manufactured prototypes of all the circuits and systems, which demonstrate the possibility of being included in practice designs. Moreover, second-order and non-lineal analyses were carried out on the circuits in order to achieve a better understanding of the functioning of these circuits and systems.

Less consumption and space

The integrated circuits are made up of transistors that unite basic cells and these, in turn, are grouped together forming integrated circuit systems. In this way, the contributions of the thesis, both to the construction of the novel basic cells as well as to the configuration of systems developed therefrom.

Thus, the thesis offers a basic cell design for chips which enables a power supply at a lower voltage. It points out that present cells operating on 3.3 volts can be reduced to 1.5 volts. To this end, conventional techniques of basic cell design have been used (through translineal links). Specifically, floating power supplies are used, introduced as an integral part of the translineal links without modifying its principal function of creating SRD systems. This contribution to circuitry not only enables the desired operation to take place at low tension but also allows the cells to have a good dynamic range.

Likewise, the PhD has developed a completely new technique for designing non-lineal basic cells. This technique enables a considerable simplification of the internal circuits of these cells, avoiding redundant components present with previous techniques. Moreover, the resulting SRD filters have a greater bandwidth, take up less surface area on the chip, require less power consumption and offer approximately the same characteristics and yields as the previous models.

The technique developed by Carlos de la Cruz also enables, with slight modifications, obtaining other useful d.c. circuits. A novel set of circuits has been developed, amongst which are ones which calculate a geometric average, squared power, one- and four-quadrant multipliers and a RMS-DC converter.

Finally, the PhD involved the design of an SRD filter with a tuning system for compensating for errors introduced into the filter parameters.